OS_Structure_2d Microkernel   The context for this question…

OS_Structure_2d Microkernel   The context for this question is the same as the previous question. 2. You are evaluating a microkernel-based OS following the principles of the L3 microkernel. The processor architecture on which this OS is running has the following features:   A byte-addressable 32-bit hardware address space.  Paged virtual memory system with a processor register called PTBR that points to the page table in memory to enable hardware address translation.  A TLB which DOES NOT support Address space IDs. A pair of hardware-enforced segment registers (lower and upper bound of virtual addresses) which limit the virtual address space that can be accessed by a process running on the processor. The use of segment registers can be toggled on or off by the user.  A virtually-indexed physically-tagged processor cache.   d. (Answer True/False with justification)  Since the TLB does not support address space IDs, the TLB will always need to be flushed upon a context switch from one protection domain to another. 

Parallel_Systems_5a M.E.Lock 5. Consider the ticket lock alg…

Parallel_Systems_5a M.E.Lock 5. Consider the ticket lock algorithm from lecture 4 (slide 108): a. Compared with the lock algorithm with delay in a previous question, what is the advantage of ticket lock’s different method of determining the amount of delay? From a programmer’s perspective what is the added value of this algorithm compared to the lock algorithm with delay in the previous question? 

The fictional element Chaffium (symbol Ch) makes two oxyanio…

The fictional element Chaffium (symbol Ch) makes two oxyanions: ChO3¯ and ChO4¯ What would be the name of ChO4¯?  Note: The fictional element name is a Latin word that ends with -ium like many real elements. Just use thesame rules as you would with a real element name.