Potpourri Answer the following questions with respect to the MCS barrier algorithm:   (Answer True/False with justification) (No credit without justification)  For the correct functioning of the algorithm, it requires an atomic read-modify-write instruction to be supported in the architecture.  

Paravirtualization The context for this question is the same as the previous question. Above picture shows the I/O ring data structure used in Xen to facilitate communication between the guest OS and Xen. Guest-OS places a request in the I/O ring using the “Request Producer” pointer. Xen places a response in the I/O ring using the “Response Producer” pointer.  Why does Xen typically not run out of space to place a response on this ring? State the invariant briefly.

Tornado The context for this question is the same as the previous question. How might Tornado decide to implement “Region” objects shown in the figure?

Memory Management Mention one advantage and one disadvantage of having a high tax rate for reclaiming unused memory from the VMs.

Memory Management A datacenter uses ballooning to allocate or reclaim memory from VMs. The hypervisor has a policy that taxes 20% of a VM’s idle memory, starting with the VM that has the most idle memory. The hypervisor can tax over multiple rounds until the request of a VM is met.   Consider this scenario:  VM1 requests 100 MB of additional memory.   The hypervisor has no free machine memory    VM2 has an idle memory of 140 MB   VM3 has an idle memory of 200 MB  List the steps taken by the hypervisor to satisfy VM1’s request. 

LRPC and Scheduling The context for this question is the same as the previous question. A server provides the following procedure via LRPC  uint64_t sum_array(const uint64_t *arr, size_t len) {     uint64_t sum = 0;     for (size_t i = 0; i < len; ++i) {         sum += arr;     }     return sum;}  The kernel will create an A-stack and map that into the client and server address spaces.  Assume the following:  (uint64_t is 8 bytes and size_t is 4 bytes)  There is programming language support for the server to access the A-stack directly. If the server wishes to entertain simultaneous calls from multiple clients, how big should the A-stack be?

As people age, they typically lose muscle mass and gain fat mass if they do not engage in regular physical activity.

Lock/Barriers Consider a cache-coherent multiprocessor.  Assume the multiprocessor offers an atomic decrement operation on a shared variable.  You decide to provide a barrier synchronization primitive in your OS that is based on the following count-based algorithm:  int count = N; // initialized to the number of participating threads barrier()0. {1. decrement(count);2. if (count == 0)3. count = N;    // last processor to arrive 4. else5. while (count > 0);  // wait for last process 6. while (count!= N);//to not leave barrier before count reset7. } Identify any two race conditions that will lead to the algorithm not working as written above. 

Potpourri Answer True/False and provide justification for your response: Cache coherence is required to support a sequentially consistent memory model. 

　 Rating 1 Rating 2 Rating 3 Rating 4 Rating 5 Male 12 14 29 69 26 Female 0 4 7 23 16 According to the contingency table, how many females gave a satisfaction rating of 4?