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True of False: A sequential circuit does not have state.

Posted on: August 21, 2025 Last updated on: August 21, 2025 Written by: Anonymous
True of False: A sequential circuit does not have state.
Continue reading “True of False: A sequential circuit does not have state.”…

True of False: A sequential circuit has state.

Posted on: August 21, 2025 Last updated on: August 21, 2025 Written by: Anonymous
True of False: A sequential circuit has state.
Continue reading “True of False: A sequential circuit has state.”…

Given the following circuit: If the inputs are E=1, A=1 and…

Posted on: August 21, 2025 Last updated on: August 21, 2025 Written by: Anonymous
Given the following circuit: If the inputs are E=1, A=1 and B=1, what is the value of Y?
Continue reading “Given the following circuit: If the inputs are E=1, A=1 and…”…

Given: An 8:1 multiplexer has data inputs D0, D1, …, D7, s…

Posted on: August 21, 2025 Last updated on: August 21, 2025 Written by: Anonymous
Given: An 8:1 multiplexer has data inputs D0, D1, …, D7, select inputs S2:0, and output Y. Suppose D0 = 1, D1 = 0, D2 = 0, D3 = 0, D4 = 1, D5 = 0, D6 = 1, D7 = 1, S2 = 0, S1 = 1, and S0 = 1.  What is the value of Y?
Continue reading “Given: An 8:1 multiplexer has data inputs D0, D1, …, D7, s…”…

A timing diagram is given for inputs to a D Flip-Flop with E…

Posted on: August 21, 2025 Last updated on: August 21, 2025 Written by: Anonymous
A timing diagram is given for inputs to a D Flip-Flop with Enable (active high). What is the value of the Q output of the D Flip-Flop with Enable at time = 1 ns? Assume the delay from inputs changing to output changing is negligible.
Continue reading “A timing diagram is given for inputs to a D Flip-Flop with E…”…

Given: A 16:1 multiplexer has data inputs D0, D1, …, D15,…

Posted on: August 21, 2025 Last updated on: August 21, 2025 Written by: Anonymous
Given: A 16:1 multiplexer has data inputs D0, D1, …, D15, select inputs S3:0, and output Y.  It is implemented using tristate buffers. What is used to enable the tristate buffer that is connected to D11?
Continue reading “Given: A 16:1 multiplexer has data inputs D0, D1, …, D15,…”…

Convert 9710 to an 8-bit two’s complement number (ex: “01101…

Posted on: August 21, 2025 Last updated on: August 21, 2025 Written by: Anonymous
Convert 9710 to an 8-bit two’s complement number (ex: “01101110”)
Continue reading “Convert 9710 to an 8-bit two’s complement number (ex: “01101…”…

Given:  Which of the following describes the same function?

Posted on: August 21, 2025 Last updated on: August 21, 2025 Written by: Anonymous
Given:  Which of the following describes the same function?
Continue reading “Given:  Which of the following describes the same function?”…

Given: An 8:1 multiplexer has data inputs D0, D1, …, D7, s…

Posted on: August 21, 2025 Last updated on: August 21, 2025 Written by: Anonymous
Given: An 8:1 multiplexer has data inputs D0, D1, …, D7, select inputs S2:0, and output Y. Suppose D0 = 1, D1 = 0, D2 = 0, D3 = 0, D4 = 1, D5 = 0, D6 = 1, D7 = 1, S2 = 1, S1 = 1, and S0 = 0.  What is the value of Y?
Continue reading “Given: An 8:1 multiplexer has data inputs D0, D1, …, D7, s…”…

A timing diagram is given for inputs to a D Flip-Flop with E…

Posted on: August 21, 2025 Last updated on: August 21, 2025 Written by: Anonymous
A timing diagram is given for inputs to a D Flip-Flop with Enable (active high). What is the value of the Q output of the D Flip-Flop with Enable at time = 13 ns? Assume the delay from inputs changing to output changing is negligible.
Continue reading “A timing diagram is given for inputs to a D Flip-Flop with E…”…
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