Given: A basic 3:8 decoder has address inputs A2:0 and outputs Y0, Y1, …, Y7. Suppose A2 = 0, A1 = 1 and A0 = 1.  Select the correct answer.

A timing diagram is given for inputs to a D Flip-Flop with Reset (synchronous, active high). What is the value of the Q output of the D Flip-Flop with Reset at time = 15 ns? Assume the delay from inputs changing to output changing is negligible.

A truth table with four output functions is given. Function Y1 will be implemented using a 4:16 decoder that has address inputs A3:0 and outputs Y0, Y1, …, Y15.  Which outputs need to be connected to an OR gate to produce function Y1 (do not confuse function Y1 with output Y1 on the decoder)? 

Convert -11810 to an 8-bit two’s complement number (ex: “01101110”)

Convert -11910 to an 8-bit two’s complement number (ex: “01101110”)

Given: 101101002  is an 8-bit two’s complement number. What is its value in decimal (ex: “-25”, “45”)

Convert -6010 to an 8-bit two’s complement number (ex: “01101110”)

Given: F(A,B,C).  Which of the following is the minterm of F that corresponds to A=0, B=1, C=0?

Given: DeMorgan’s Theorem and its dual are:     

Convert 20110 to an 8-bit unsigned binary number (ex: “01101110”)