MULTIPLE ANSWER: Select two choices corresponding to the val…

MULTIPLE ANSWER: Select two choices corresponding to the values of “AB” and the value of ‘D’ (Problem has been divided for partial credit):   AB 60%, D 40% We want to perform path delay testing of the delay-path shown in red. What should be the values of A, B and D to allow this testing? path-delay-upscaled.jpg

Referring to the circuit below, the aggressor line is capaci…

Referring to the circuit below, the aggressor line is capacitively coupled to the victim line via a coupling capacitor Cc​. The aggressor waveform is shown on the figure On the victim side, a NAND gate drives the line. First input is at logic 1, but the rising transition at the 2nd input cause a slow falling waveform on the victim line as shown.  Assume this waveform shown on the victim line is before the coupling event. What type of crosstalk event is expected to occur at the input of the OR gate (marked with a question mark) due to this coupling? victimline_UPSCALED-upscaled.jpg

 For an Al1 wire, assume the parallel plate capacitance per…

 For an Al1 wire, assume the parallel plate capacitance per unit area is  0.07 fF/μm2 and fringing capacitance is 0.02fF/μm. The wire is 10  cm long and 1 μm wide. Assume unit length wire resistance is 0.02 Ohms/ μm . Using a lumped RC model for the wire and determine the time required at the output to reach 63% point. Choose the answer closest to what you have found.