Suppose a computer has 210 bytes of byte-addressable main me…

Suppose a computer has 210 bytes of byte-addressable main memory, and a cache of 64 blocks, where each cache block contains 4 bytes. How address is divided into tag, line number and byte offset for direct mapped cache? How address is divided into tag, line number and byte offset for fully-associative cache? How address is divided into tag, set number and byte offset for two-way set associative cache?