_______ are events that alter the normal flow of execution in a computer system. They are used for I/O, error handling, and other miscellaneous events.

With a ________ processor, a different thread can be used to execute the ISR, as a result the main program will not be put on hold.

What is the maximum byte addressable memory capacity (in bytes) if the address bus is 10 bits?

For _______ architecture only Load and Store instructions can reference the memory.

Translate the following C statement into assembly program, assuming 32-bit signed integers x is stored in 32-bit register r0.  z is a global variable, stored in main memory. Initialize x to 5.   z = x + 3;

DMA operation requires the execution of an ISR by the CPU.

For _______ architecture only Load and Store instructions can reference the memory.

DMA operation requires the execution of an ISR by the CPU.

GCC directive, __________ must be used to allocate 2 bytes for a variable.

GCC directive, __________ must be used to allocate 2 bytes for a variable.