Potpourri Consider the following lock algorithm using T&S: w…

Potpourri Consider the following lock algorithm using T&S: while ((L == locked) or (T&S(L) == locked)) {   while (L == locked); // spin   delay (d); // different delays for different processors } // success if we are here  (Answer True/False with justification) (No credit without justification) This algorithm does not rely on hardware cache coherence. 

Full Virtualization The context for this question is the sam…

Full Virtualization The context for this question is the same as the previous question. An engineering firm is running a critical, unmodified legacy CAD application inside a fully virtualized VM on an older x86 server. The application frequently makes privileged calls that interact directly with the hardware. An administrator notices poor performance and learns that this specific, older x86 architecture has a “quirk” where certain privileged instructions, when executed by the guest OS (which is running in an unprivileged mode), fail silently instead of causing a trap to the hypervisor.  What technique does VMware ESX use to overcome this architectural limitation and ensure the guest OS functions correctly? 

LRPC and Scheduling The context for this question is the sam…

LRPC and Scheduling The context for this question is the same as the previous question. A server provides the following procedure via LRPC  uint64_t sum_array(const uint64_t *arr, size_t len) {     uint64_t sum = 0;     for (size_t i = 0; i < len; ++i) {         sum += arr;     }     return sum;}  The kernel will create an A-stack and map that into the client and server address spaces.  Assume the following:  (uint64_t is 8 bytes and size_t is 4 bytes)  There is programming language support for the server to access the A-stack directly. During the actual call what is the action on the client side so far as A-stack is concerned?