Potpourri Consider the following lock algorithm using T&S: w…
Potpourri Consider the following lock algorithm using T&S: while ((L == locked) or (T&S(L) == locked)) { while (L == locked); // spin delay (d); // different delays for different processors } // success if we are here (Answer True/False with justification) (No credit without justification) This algorithm does not rely on hardware cache coherence.