Parallel_Systems_4b M.E.Lock The context for this question i…

Parallel_Systems_4b M.E.Lock The context for this question is the same as the previous question. 4. Consider the following lock algorithm: while ((L == locked) or (T&S(L) == locked)) {    while (L == locked); // spin    delay (d); // different delays for different processors  }  // success if we are here    b. What are the program characteristics that would negatively impact the program’s performance with this lock algorithm implementation? In what way does it reduce performance? 

Parallel_Systems_5b M.E.Lock The context for this question i…

Parallel_Systems_5b M.E.Lock The context for this question is the same as the previous question. 5. Consider the ticket lock algorithm from lecture 4 (slide 108): b. What are the downsides of the ticket lock algorithm for systems with write-update cache coherence? Briefly explain your answer.

Potpourri_6b Potpourri The context for this question is the…

Potpourri_6b Potpourri The context for this question is the same as the previous question. 6. I/O ring data structures can be used to facilitate data transfer between paravirtualized guest OSs and the hypervisor. Consider a guest OS making a hypercall to the hypervisor to write some data to disk. The process begins with the guest making the write request, followed by the hypervisor processing the request and responding. Finally, the guest consumes this response.      b. Access to the ring data structure is through several pointers. For the disk write, describe in order the sequence of pointer modifications from request production to response consumption. Assume that there is space in the I/O ring for the Guest OS to enqueue a new request. For each modification, state: who makes the modification (guest or hypervisor).  which pointer is modified.  what the pointer modification is. 

Parallel_Systems_4c M.E.Lock The context for this question i…

Parallel_Systems_4c M.E.Lock The context for this question is the same as the previous question. 4. Consider the following lock algorithm: while ((L == locked) or (T&S(L) == locked)) {    while (L == locked); // spin    delay (d); // different delays for different processors  }  // success if we are here    c. What are the program characteristics that would enhance the program’s performance with this lock algorithm implementation? In what way does it improve performance?

Virtualization_4 Memory Management 4. [4 points] A hyperviso…

Virtualization_4 Memory Management 4.  A hypervisor uses ballooning mechanism to allocate/reclaim memory from the VMs, and the memory management policy it follows is as follows:  50% tax on idle memory of a VM  Cycle through all VMs with idle memories before double taxing any one VM    Consider the following scenario:  VM1 requests 800 MB of memory from the hypervisor  VM2, VM3, VM4 have respectively 200 MB, 400 MB, and 1 GB of idle memory    List the steps taken by the hypervisor to satisfy the memory request of VM1.

OS_Structure_2d Microkernel   The context for this question…

OS_Structure_2d Microkernel   The context for this question is the same as the previous question. 2. You are evaluating a microkernel-based OS following the principles of the L3 microkernel. The processor architecture on which this OS is running has the following features:   A byte-addressable 32-bit hardware address space.  Paged virtual memory system with a processor register called PTBR that points to the page table in memory to enable hardware address translation.  A TLB which DOES NOT support Address space IDs. A pair of hardware-enforced segment registers (lower and upper bound of virtual addresses) which limit the virtual address space that can be accessed by a process running on the processor. The use of segment registers can be toggled on or off by the user.  A virtually-indexed physically-tagged processor cache.   d. (Answer True/False with justification)  Since the TLB does not support address space IDs, the TLB will always need to be flushed upon a context switch from one protection domain to another. 

Parallel_Systems_5a M.E.Lock 5. Consider the ticket lock alg…

Parallel_Systems_5a M.E.Lock 5. Consider the ticket lock algorithm from lecture 4 (slide 108): a. Compared with the lock algorithm with delay in a previous question, what is the advantage of ticket lock’s different method of determining the amount of delay? From a programmer’s perspective what is the added value of this algorithm compared to the lock algorithm with delay in the previous question?