Examine the function prototype and MIPS implementation below…
Examine the function prototype and MIPS implementation below. // sets *value = (*value) * 2^pow using shifting instructions int multMemPow2(int *value, unsigned int pow); multMemPow2: 1 lw $v0, 0($a0) # load value 2 loop: beq $a1, $0, exit # exit condition 3 sll $v0, $v0, 1 # multiply by 2 4 addi $a1, $a1, -1 # decrement counter 5 sw $v0, 0($a0) # store result 6 j loop 7 exit: jr $ra We are using a 5 – stage MIPS pipelined datapath with separate I$ and D$ that can read and write to registers in a single cycle. Assume no other optimizations (no forwarding, no branch prediction, etc.). The default behavior is to stall when necessary. Branch checking is done during the Execute stage. For parts (1)‐(3), let pow=1. When we ask for clock cycles to execute multMemPow2, we mean from the instruction fetch of lw up to and including the write back of jr. How many instructions are executed in multMemPow2?