A given circuit has the following paths between flip-flops:…
A given circuit has the following paths between flip-flops: Path 1: 3.5 ns Path 2: 2.2 ns Path 3: 1.9 ns Path 4: 2.1 ns Assuming all flip-flops are in the same clock domain, what is the maximum clock frequency of this circuit ignoring setup and hold times? Specify your answer in MHz rounded down (i.e., the floor) to the nearest integer. (e.g. the answer for 100.7 MHz should just be 100).